SasoEquity
AI & Robotics Investor
CXL memory has another growth market beyond AI inference: in-memory databases and real-time analytics such as fraud detection, recommendations and risk engines, which are bound by memory capacity, not compute. Penguin says its MemoryAI platform delivers 150% more transactions per second with Leo CXL expansion. Astera Labs' Leo controllers show 73% more recommendations per second and 40% faster chatbot responses. Marvell's Structera chips suit databases as much as LLM inference. x.comÂ
Ever-longer AI context windows make inference a memory problem, benefiting Micron, SanDisk, Penguin Solutions, Astera Labs and Credo. Context windows grew 125-250x in two years and keep expanding about 30x a year, swelling KV cache to hundreds of GB per session; inference is 70% memory-bound. That lifts DRAM and HBM demand, and overflow moves to CXL pooled memory, where Penguin has the first production CXL KV cache server, Astera makes CXL controllers and retimers, and Credo links the racks. x.com x.comÂ
Inference's move toward edge devices and dense, memory-hungry racks should drive demand for specialized chips, links, power delivery and cooling. McKinsey projects inference at 60% of AI computing demand by 2030. Ambarella makes on-device AI chips; Astera Labs links GPUs, memory and networks; Credo supplies short copper connections; Rambus earns from memory interfaces; Navitas reduces power waste; Modine cools dense racks; and Super Micro builds inference-specific server racks at volume. x.com … Show more
AI inference is hitting a memory limit, and CXL switching, which pools memory across servers, is where the value map changes. HBM is costly and limited per chip, and bigger models outgrow one server. Marvell is the bet on switching as the control point, via XConn and Structera S, now in production. Penguin Solutions makes CXL deployable in its KV cache server. Micron's CXL DRAM is a structural tailwind still tied to DRAM cycles, and Credo sits in the competitive transport layer. x.com x.com … Show more
Astera Labs carries a huge premium for flawless execution against a CXL market that is small near term. Switch-based CXL memory pooling capturing $15-16B in 2026-2028 is low probability: Marvell guides its XConn switch business to only about $100M by fiscal 2028, PCIe included. Pooling software likely stays immature into 2028, per a Samsung white paper, and Nvidia is contesting the warm KV-cache tier. Astera does CXL best, but SK hynix and Micron offer better risk-adjusted returns. x.com x.comÂ
Penguin Solutions benefits as more AI tightens DRAM and lifts demand for its memory systems, with CXL as a high-beta moonshot. It reaffirmed FY26 revenue and EPS at the high end of guidance, and its CEO says memory and AI infrastructure demand keeps growing. CXL lets GPUs use DRAM pools about 20x cheaper than HBM and 10-100x larger, easing the KV-cache bottleneck in long-context inference. Penguin is the most compelling high-beta CXL bet, though CXL is still tiny for its business. x.com x.comÂ
AI infrastructure bottlenecks could give eight stocks as much as 18x upside. Nvidia supplies frontier-model GPUs; Broadcom and Marvell supply custom silicon and networking; TSMC makes advanced chips; Micron supplies sold-out HBM; Vertiv provides power and cooling; Palantir monetizes enterprise AI; Alphabet spans TPUs, research, cloud and apps. The list tracks where AI infrastructure spending is flowing. x.com x.comÂ
Penguin Solutions looks more like memory-cycle strength dressed up as an AI pivot story, and its price has already run ahead of that story. Its legacy AI factory business was concentrated in hyperscaler hardware, and the pivot to enterprise, neocloud and sovereign customers is a rebuild that the numbers do not show yet, with longer sales cycles and delayed bookings. The IP is good, and winning qualifications could change the view, but that needs a real shift first. x.comÂ
Penguin is in pole position to bring optical memory systems to customers because it was already developing a Photonic Memory Appliance with Celestial AI. Marvell is showing an HBM-and-DDR5 module that creates 33TB memory pools over optical links up to 50 meters, letting memory capacity scale independently of GPUs. x.comÂ
Marvell's new six-channel chips could ease AI servers' memory constraint by letting them add capacity for bigger models and longer prompts. Samples are expected in Q1 2027. Its custom silicon and connectivity could capture more AI infrastructure spending, though competition and customer bargaining limit retained value. x.comÂ
Astera Labs' CXL integration thesis faces a threat if Nvidia builds a CXL-attached memory architecture: Jensen would not use Astera for it. Such an architecture could make training and data sharing across nodes easier. Nvidia's Feynman might also get a better I/O die to avoid switch hops, as Google did with TPUs. x.com x.comÂ
Agentic AI's repeated context favors cache memory and storage demand for Micron, SK hynix and Sandisk over fresh GPU computation. Per @demian_ai, about 95% of input tokens for DeepSeek V4.1 Flash on OpenRouter were cache hits; storage matters unless routing and caching keep almost everything in GPU memory. New products such as 3D DRAM and HBM-on-logic could be the final trigger for a full memory-stock re-rating. x.com x.comÂ
