Montage Technology's strength in memory interfaces is confirmed by the South Korean investigation into it. On top of that, it addresses the huge demand runways of CXL and PCIe retimers, two links AI scale-up cannot bypass. x.com
Macro_Lin
Semiconductor Analyst, AI Chip Design, Ex-Quant/Portfolio Manager
Montage Technology's PCIe retimers are indeed undervalued if ASIC makers widely adopt PCIe for copper scale-up, and its CXL retimers should ramp. For ASIC makers without a private protocol like NVLink, PCIe gives end-to-end latency of tens of microseconds, orders of magnitude below Ethernet scale-up, with 128GB/s per direction on Gen6 and 256GB/s on Gen7. Bernstein has raised its Montage target to 400 yuan, matching the earlier call for 400. x.com x.com x.com
Astera Labs and Montage Technology win the memory redesign rather than the shortage itself. They don't sell memory but determine how much memory everyone else needs to buy, a different kind of moat from that of memory producers. x.com
Inference's move toward edge devices and dense, memory-hungry racks should drive demand for specialized chips, links, power delivery and cooling. McKinsey projects inference at 60% of AI computing demand by 2030. Ambarella makes on-device AI chips; Astera Labs links GPUs, memory and networks; Credo supplies short copper connections; Rambus earns from memory interfaces; Navitas reduces power waste; Modine cools dense racks; and Super Micro builds inference-specific server racks at volume. x.com … Show more
Marvell looks well positioned for scale-up compute domains, where interconnect is the wall that limits performance. Scale-up domains should be thought of differently from simply networking racks together, and Marvell's own commentary now focuses on exactly that opportunity. x.com x.com
The AI memory wall is a structural bottleneck only beginning to be priced in, favoring companies that move data closer to compute. Training wastes about 90% of energy moving data, HBM4 uses 3x DDR5's wafer capacity, and DRAM and NAND spot prices rose 80–90%. Corsair holds DRAM bought at 2025 prices; Penguin's CXL-based MemoryAI server trades near 10–12x forward earnings with near-100% EPS growth; Rambus has HBM4E controllers and 80%-plus gross margins; Sanmina's Viking makes US-built memory. … Show more
Marvell's memory-interconnect opportunity now includes sharing more memory across inference hosts. Its second-generation Structera X CXL 3.2 controllers can support up to four hosts, with up to 6TB of DDR5 per controller and workload-dependent compression offering 2-3x effective capacity for longer contexts and KV caches, per Marvell. First-generation products ship to hyperscalers; the new controllers are expected to sample in Q1 2027, so customer adoption and production remain checkpoints. … Show more
AI inference is hitting a memory limit, and CXL switching, which pools memory across servers, is where the value map changes. HBM is costly and limited per chip, and bigger models outgrow one server. Marvell is the bet on switching as the control point, via XConn and Structera S, now in production. Penguin Solutions makes CXL deployable in its KV cache server. Micron's CXL DRAM is a structural tailwind still tied to DRAM cycles, and Credo sits in the competitive transport layer. x.com x.com … Show more
Marvell's new six-channel chips could ease AI servers' memory constraint by letting them add capacity for bigger models and longer prompts. Samples are expected in Q1 2027. Its custom silicon and connectivity could capture more AI infrastructure spending, though competition and customer bargaining limit retained value. x.com
Penguin Solutions benefits as more AI tightens DRAM and lifts demand for its memory systems, with CXL as a high-beta moonshot. It reaffirmed FY26 revenue and EPS at the high end of guidance, and its CEO says memory and AI infrastructure demand keeps growing. CXL lets GPUs use DRAM pools about 20x cheaper than HBM and 10-100x larger, easing the KV-cache bottleneck in long-context inference. Penguin is the most compelling high-beta CXL bet, though CXL is still tiny for its business. x.com x.com
Kimi K3's engineering workarounds for memory limits should lift demand across AI infrastructure suppliers, and more such innovations are expected. Moving prompt history to CPU memory favors Astera Labs, with a 2027 custom Leo CXL design win, and perhaps Penguin Solutions. NVMe overflow memory favors Phison. Denser racks lift Semtech and Credo interconnects. Mass sandboxes favor JFrog and Cloudflare. Rambus supplies memory buffer chips; cluster migrations favor Lumentum's optical switching. x.com … Show more
Astera Labs is a misunderstood AI infrastructure winner because the next AI bottleneck is connectivity, not just compute. Its PCIe, CXL, Ethernet and UALink products and software let accelerators, memory, storage and fabric work as one rack-scale system, so its value grows as racks get denser and clusters larger. Design wins are converting into sales: Q1 2026 revenue of $308.4 million rose 93% year on year and beat estimates by 5%, while EPS of $0.61 beat by 13%. x.com x.com